Samsung is gearing up for the transition to 2nm fabrication in the semiconductor industry, with its Gate All Around (GAA) SF2 2nm process. Synopsys has announced its readiness for SF2, with certified design tools and IP for chip production work and tape-outs on Samsung’s latest fab. The collaboration between Synopsys and Samsung includes design techniques for SF2, such as backside power and nanosheet optimization. Synopsys has also prepared its AI-driven analog and digital design flows for SF2, along with its IP portfolio for chip designers to use in their designs. Chips built on SF2 are expected to be rolled out in 2025, with potential designs for smartphones like the Samsung Exynos 2600 and Qualcomm Snapdragon 8 Gen 5 for Galaxy. Samsung claims that SF2 will increase transistor performance, reduce variability, and decrease leakage compared to a FinFET-based process. Synopsys believes it is well-positioned to capitalize on this process node transition and has a broad portfolio of certified IP products for Samsung fabrication. As the industry focuses on AI chips, the importance of advanced fabrication processes with certified design flows and IP cannot be overlooked.
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Source link: https://www.forbes.com/sites/karlfreund/2024/06/12/synopsys-certifies-ai-lead-design-and-ip-solutions-for-samsungs-2nm/
Synopsys certifies AI-driven design and IP solutions for Samsung’s 2nm #AIinDesign
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